03/13/2018

Complete nanotopography analysis of wafers by using the MicroProf®

The scaling of transistor structures to ever smaller structure sizes is crucial for improving chip performance while increasing energy efficiency. Lithography processes for these advanced chip generations require silicon wafers tailored to the requirements of chip manufacturers. State-of-the-art lithography processes require silicon wafers with almost perfect flatness. In order to improve wafer manufacturing processes and wafer quality, previous manufacturing processes such as grinding and lapping must be monitored. Nanotopography (NT) evaluation is an established approach for the analysis of surface features in a spatial wavelength range from 0.2 to 20 mm on silicon wafers at the end of the production line (EoL).

In wafer manufacturing, the basis for perfect surface quality in EoL is already given in the early stages of production. This requires a suitable measuring technique which is able to measure the surface topography of a complete wafer after lapping or grinding processes, i.e. on unpolished surfaces with strongly varying reflectivity.

The MicroProf® FE provides a reliable solution for the NT measurement of 300 mm silicon wafers at early stages of production. The system is able to adapt on different optical surface properties of the samples; polished as well as ground or lapped wafers can be measured. To create a complete wafer map, 16 individual measurements must be combined using special algorithms. The performance of the MicroProf® FE meets the precision requirements of NT measurements, especially on ground wafer surfaces.

The MicroProf® FE is the standard solution for fully automated measurement applications in the semiconductor industry. The system features robot handling for 200 mm and 300 mm wafers in an EFEM housing (Equipment Front End Module) with ISO class 3 clean room conditions. The control is completely carried out via automation software. A graphical user interface enables the individual setting of measuring recipes. A SECS/GEM protocol-based interface is available for integration into production automation. The MicroProf® FE was developed for high-precision optical topography and thickness measurement on 300 mm wafers. It has two loadports for the automatic handling of wafer cassettes. An integrated notch alignment station enables the orientation of the wafer before it is placed on the wafer stage. The wafer handling was realized by a backside gripping system using vacuum paddles. This also makes it possible to handle wafers without rounded edges. The measuring unit of the MicroProf® FE is designed with a solid granite base and as a gantry construction. A high-precision 420 mm x 310 mm xy table is used for precise positioning of the wafer below the sensors.

For NT analysis, the MicroProf® FE includes a WLI sensor and a chromatic white light point sensor (CWL). The WLI sensor is used for area measurement, while the CWL sensor, in combination with a second CWL sensor mounted oppositely under the table, allows wafer thickness and shape to be measured. The key component for NT analysis, the white light interferometric sensor WLI PL, offers a large image field (FoV) of approx. 85 x 85 mm2. The lateral resolution is better than 150 μm and the vertical accuracy is below 10 nm. The sensitivity of the sensor can be adjusted to test surfaces with low reflectivity such as ground or lapped silicon wafers.

To measure NT features in the nm range, a precise design of the wafer holder is required. Conventional vacuum wafer holders cannot be used due to the plane wafer topography. In addition, particles that unavoidably remains on the wafers after grinding and accumulate on the chuck result in NT artifacts of a wafer. Depending on the specific wafer chuck, the gravitational bowing of the wafers has a large influence on the nanaotopography. In addition, undamped vibrations of the wafer can affect the accuracy of an interferometric measurement. For this reason, a wafer chuck has been developed that softly holds the wafer. Small cut-outs allow wafer handling and thickness measurements along predefined directions. The chuck shape has been optimized to minimize remaining gravitational deformations of a silicon wafer by the subsequent NT filter process.

The measuring process is controlled by the FRT automation software Acquire Automation XT. All settings for measurement and the following data processing are recipe-controlled. The measuring tool is connected to the production automation system via the SECS/GEM interface. This enables the complete control of the measuring process and the transfer of the measuring data including the results of the wafer classification to a central database. 16 individual measurements are required to cover a complete 300 mm wafer surface with the WLI PL sensor with FoV of 85 x 85 mm2. The measuring table moves the wafer under the fixed sensor to obtain the 16 single images. At each of these 16 positions, the 3D scan is captured with a 10 mm overlap between adjacent images. A throughput of 20 wafers per hour including wafer handling and data processing can be achieved.

After the stitching process, the topography map must be high-pass filtered to remove the global wafer shape. The high-pass filtering according to SEMI standard M78, i.e. the application of a double Gaussian filter (DG) with a cut-off wavelength of 20 mm, is implemented in the software. Data extrapolation beyond the physical wafer edge enables artifact-free near edge filtering and thus edge exclusion < 1 mm.

NT analysis and data reporting are implemented according to the SEMI standard M43. The first step after NT filtering is to determine the peak-to-valley (PV) height variation between the pixels in a predefined analysis range. The value is assigned to the center of the analysis area. This calculation is repeated by moving the analysis area pixel by pixel over the entire area of the wafer. Circular or square analysis areas can be used. Typical sizes are between 2 x 2 mm² and 10 x 10 mm² (for square areas). In the next step, the threshold curve is generated as % area vs. threshold curve. The % area is calculated from the number of analysis areas where the PV value is higher than the threshold value. The area is expressed as a percentage of the total wafer area. Finally, two parameters are calculated from the threshold curves: % area at a given threshold and PV threshold at a given % area. This approach is called Threshold Height Analysis (THA). Our MicroProf® thus provides a reliable solution for the NT measurement of 300 mm silicon wafers at early stages of production.

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