Part 8: Metrology for Every Process Step in Advanced Packaging

MicroProf® AP – Flexible Multi-Sensor Metrology for Every Process Step in Advanced Packaging

As wafer level packaging (WLP) and heterogeneous integration (HI) approaches become more relevant, metrology processes begin to creep into back-end process control, where measurement becomes trickier and more diversified. The dawn of fan-out (FO) processes both at the wafer and panel level has added more diversity to metrology needs. The addition of 2.5D and 3D heterogeneous integration, and now chiplet technologies further expands the diversity of applications. FRT offers integrated solutions for these challenging tasks. We are able to accommodate measurement requirements for the most varied processes and to handle wafers and panels, thinned and bonded wafers, and also film frames.

The MicroProf® AP is a fully automated wafer metrology tool, for a wide range of applications at different 3D packaging process steps, e.g. for the measurement of photo resist (PR) coatings and structuring, through silicon vias (TSVs) or trenches after etching, μ-bumps and Cu pillars, as well as for the measurement in thinning, bonding and stacking processes. With its high flexibility and universality, enabled by its modular multi-sensor concept, it is ideally suited to perform a wide range of measurement tasks in advanced packaging within one metrology tool.

It also provides comprehensive measurement solutions for backside processing (backgrinding, metallization) for power semiconductors such as MOSFET or IGBT, as well as for the control of different substrates, e.g. bulk Si, SOI, cavity SOI, compounds such as GaAs, InP, SiC, GaN, ZnO, and also for transparent materials. Furthermore it can be used for hybrid bonding and Micro Electro Mechanical Systems (MEMS) included in consumer electronics, automotive, telecom, medical and industrial markets. MEMS are manufactured in processes similar to semiconductor production.

The core component is the worldwide established MicroProf 300®. This multi-sensor metrology tool allows both the measurement of wafers at different process steps and – by using a hybrid metrology concept – to enhance the precision of measurements on samples where a single sensor or measuring principle is just not enough. Depending on the task, this may include measurements with different topography and (film) thickness sensors that are fully automated by a single recipe. Controlled by FRT’s in house developed software, these sensors act as one to automatically combine different information and thereby generate new information that is not directly accessible.

With a wafer handling system within an Equipment Front End Module (EFEM) and almost maintenance free hardware components, the MicroProf® AP provides high throughput and is the perfect workhorse in any HVM 3D IC fab.

The measurement system of the MicroProf® AP is equipped with a granite base setup, with a three point sample fixture or a vacuum chuck. Besides the standard configuration, the tool can be equipped with numerous additional features, which can also be retrofitted on site at a later time. The MicroProf® AP enables for keeping pace with Advanced Packaging’s fast progression and a quick recovering of investment costs.

The MicroProf® AP is designed for fully automated processing of 300 mm FOUPS/FOSBs and 300 mm/200 mm/150 mm open cassettes. Moreover, the tool can be also configured for processing frame cassettes and handling of panels. The handling part features a robot with end-effector, two load ports including mapper and RFID reader, pre-aligner and optional OCR reader stations. The system is able to handle SEMI standard wafers, highly warped wafers (e.g. eLWB), bonded wafers, wafers on tape, TAIKO, bare and thinned wafers and even Fan-Out wafers. The EFEM is equipped with filter fan units (FFU) providing ISO class 3 clean room conditions within the tool. The system can be configured e.g. as a single 200 mm or 300 mm tool or as a 200/300 mm bridge tool. Further options are thin wafer handling capability and an ionizer bar. For integration into the shop floor automation, the tool is equipped with a SECS/GEM data interface. Measurement tasks are then triggered by the host and the measurement results are transferred automatically to the fab control system.

The tool is run by the SEMI-compliant Acquire Automation XT software. This software allows recipe based measurement and data analysis of structured and unstructured wafers. Choose the suitable measurement and evaluation routine for your measuring task from a variety of packages. For recurring structures, a layout wizard with a graphical user interface (GUI) can support you in teaching the measuring positions. In addition, fine sample alignment via pattern recognition is available.

This software provides comprehensive capabilities, from manual measurement on the device to fully automated measurement with one button operation and integration into production control systems, e.g. via a SECS/GEM interface. You can easily configure various measurement tasks using different sensors to run consecutively within a measurement sequence. This includes the execution of measurements, processing and analysis using intelligent algorithms, output and visualization of results in the form of reports and the export of results in various data formats.

Whether laboratory, development, quality assurance or production - FRT offers the suitable measurement technology for your application from Advanced Packaging. Do not hesitate to contact us if you have any questions. Our experts will be glad to help you solve your measurement tasks by creating the best possible system configuration for you.


Interested in latest posts of this series? Click below.

Part 1/8: Metrology for Semiconductor Lithography

Part 2/8: Metrology for TSV Fabrication

Part 3/8: Metrology for RDL, UBM and Solder Bump Fabrication        

Part 4/8: Metrology for Carrier Bonding/ Debonding, Backside Thinning and Nail Reveal

Part 5/8: Metrology for Wafer Dicing

Part 6/8: Metrology for 3D Chip Stacking

Part 7/8: Metrology for Molding of 3D Chip Stacks