Series: Advanced Packaging - Multi-Sensor Metrology for Every Process Step
Advanced packaging technologies are rapidly evolving in the semiconductor industry to achieve the functionality, speed and form factor required for the mobile market. Wafer Level Packaging (WLP) is a leader in high volume manufacturing (HVM) with 3D IC stack devices directly behind it. The cost and complexity of these new packaging technologies require cost-effective inspection and metrology solutions across the entire process to ensure product quality and yield.
TSVs are fabricated at the front-end and must be monitored as the etch variation is critical for the subsequent reveal process. Once the TSVs are etched and filled, bumps are applied to the top of the wafer for interconnection. To expose the TSVs, the front of the wafer is temporarily bonded to a carrier so that the bottom can be thinned. The remaining silicon thickness (RST) must be measured during grinding and subsequent areal etching to ensure a uniform reveal process over the entire wafer. In this way, the TSV connections are uniformly revealed, which is crucial for the subsequent stacking of the chips or the entire wafer. Each process step must be monitored and the tolerance range of each process must be determined and controlled.
After bonding the product wafer onto a carrier with an adhesive layer, the measurement of the thickness variation of carrier and adhesive is crucial for monitoring the quality of the adhesive layer. Variations in the thickness of the carrier and the adhesive coating result in the remaining silicon thickness (RST) between the TSV and the bottom side of the product wafer varying after wafer thinning.
The initial RST, after carrier bonding and before wafer thinning, can also be measured. After the measurement of the initial RST, as well as the carrier thickness and adhesive coating thickness variation, the product wafer can be grinded so that the final RST is as uniform as possible.
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After the thinning process, but before the TSV copper nails are revealed, the final RST can be measured. Both the average RST and the thickness variation across the wafer are important as this information is used in the subsequent etching process to reveal the TSV copper nails to ensure a uniform Cu nail height across the wafer.
After the reveal process is complete, the height of the Cu pillars relative to the wafer surface and the thickness of the protective polymer layer must be determined. Pillar height and coplanarity are key factors to ensure that the required tolerances are maintained before the subsequent stacking process. After determining the pillar height, a defect inspection of the revealed Cu pillars and the wafer surface must be performed for the subsequent stacking process.
Finally, the debonding process is performed by separating the product wafer from the carrier. After debonding, the wafer must be checked for any defects that may occur during the temporary bonding process. The wafer surface must also be checked for any adhesive residues and defects on bumps, as well as the height of solder bumps, micro bumps and Cu pillars needs to be measured.
High quality, fully automatic multi-sensor measuring technology from FRT contributes to the monitoring of process tolerances in wafer processing in the different process steps of advanced packaging and helps to meet the required quality standards of the producers.
The thickness must be maintained over the entire wafer in the range of a few micrometers. Since the wafer is usually provided with a doping or structures with a defined penetration depth, a grinding process, for example, must be adjusted in such a way that the thickness does not undercut a certain value. The requirements for accuracy and reproducibility of the measuring systems used are increasing, expecially for small tolerances. Optical non-contact thickness measurement has been successfully established in this field. In addition to thin wafers, bonded or taped wafers can also be measured. For wafer thickness and surface measurement FRT relies on a diametrically arranged, calibrated sensor configuration consisting of two non-contact chromatic point sensors. They measure the distance to the wafer at its top and bottom. In this way, the local wafer thickness as well as the thickness variation is reliably determined over the entire wafer surface according to the SEMI standard.
With a maximum wafer diameter of 300 mm, the system achieves a resolution of less than 10 nm for thickness measurement. At the same time, roughness and structure on both sides of the sample can be measured. A special sample holder supports the wafer in such a way that it only lies on the outer edge. The sensors are arranged above and below the sample. The lower sensor remains fixed once aligned and is automatically at the correct working distance due to the sample holder. The upper sensor is approached via the z-axis. The variation of the absolute thicknesses can be measured over the entire sample area. The thickness variation in particular, defined by the TTV value, is an indicator of quality in wafer grinding. It enables conclusions about whether the removal has been carried out uniformly. Only wafers with a very low TTV value can be used for the demanding further processing steps.
The FTR sensor was developed in-house for the determination of layer thicknesses in the sub-micrometer range, from a few tens of nanometers up to several tens of micrometers, as well as for the analysis of complex multi-layer structures with high resolution. Depending on the requirements, the thin-film sensor is used in variants with different wavelength ranges, so that optimal measuring conditions are provided for different materials and layer thicknesses.
For materials that are opaque to visible light but transparent to infrared light, FRT enables thickness measurement with the IRT sensor. The adhesive layer of bonded wafers, as well as cavities and defects can be determined. The sensor is characterized by a large measuring range and an x,y resolution of 6.5 μm. With the established tools of the MicroProf® series, the IRT can be used for 3D layer thickness mappings and 2D layer thickness profiles.
FRT offers both manual and fully integrated measurement solutions with robotic wafer handling, recipe creation, automatic evaluation of measurement data and a SEMI-compliant SECS/GEM interface for connection to the fab host.
Whether laboratory, development, quality assurance or production - FRT offers the suitable measurement technology for your application from Advanced Packaging. Do not hesitate to contact us if you have any questions. Our experts will be glad to help you solve your measurement tasks by creating the best possible system configuration for you.
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